3Dwarrior
SOCIAL:
Filed under: Tech

Intel Sapphire Rapids ‘4th Gen Xeon’ CPU Delidded By Der8auer,…

An Intel Sapphire Rapids ‘4th Gen’ Xeon CPU sample has been delidded by Der8auer, the renowned German overclocker and fanatic.

Intel’s Large Sapphire Rapids-SP ‘4th Gen’ Xeon CPU Package deal Delidded, Unveils 56 Core Serious Main Depend Die

This isn’t really the 1st time we are wanting at a delidded Intel Sapphire Rapids-SP Xeon CPU. In truth, there have been multiple leaks in the past and we even obtained to see some high-res chip shots straight out of Intel’s Arizona fabs where the next-gen server chips are remaining created.

Intel Sapphire Rapids Xeon CPU Delidding (Image Credits: Der8auer):

There are several of these chip samples circulating in the on the web marketplaces (eBay in this situation) and this specific variant was the ‘Xeon vPRO XCC QWP3‘. We can’t convey to what the actual specs are for this chip but less than the hood, it arrives with an Excessive Core Depend (XCC) die that attributes 4 tiles, each and every tile with 14 cores and a total of fifty six cores on the best-finish SKU.

Intriguing points that you will recognize in the course of the delidding approach for the Intel Sapphire Rapids Xeon CPU, as demonstrated in the online video, is that the chip functions a soldered design and works by using higher-close liquid-metal TIM with gold plated IHS. The caps on the interposer are also silicone guarded to assure the best thermal overall performance doable for the Xeon CPUs. Der8auer applied his possess package for delidding and it was a straightforward pop the lid technique to expose the die (or dies in this scenario) beneath the massive IHS.

Intel Sapphire Rapids Xeon CPU Die Shots (Graphic Credits: Der8auer):

With all 4 chiplets exposed, we can see that beneath them is a 4×4 (1 IMC tile) main configuration which means every single die is made up of up to fifteen cores. It need to be 16 main but 1 of the core area is taken up by the IMC hence we are only remaining with 15 of the full cores out of which one will be disabled for far better yields. This implies that every single die will in simple fact element fourteen cores for a full of 56 cores for every CPU.

This is All the things We Know About The 4th Gen Intel Sapphire Rapids-SP Xeon Family

In accordance to Intel, the Sapphire Rapids-SP will arrive in two deal variants, a conventional, and an HBM configuration. The normal variant will characteristic a chiplet design composed of four XCC dies that will attribute a die dimensions of all over 400mm2. This is the die dimension for a singular XCC die and there will be four in total on the top rated Sapphire Rapids-SP Xeon chip. Every single die will be interconnected by using EMIB which has a pitch size of 55u and a core pitch of 100u.

The normal Sapphire Rapids-SP Xeon chip will characteristic 10 EMIB interconnects and the total package will evaluate at a mighty 4446mm2. Transferring over to the HBM variant, we are obtaining an elevated quantity of interconnects which sit at 14 and are wanted to interconnect the HBM2E memory to the cores.

The 4 HBM2E memory packages will characteristic 8-Hello stacks so Intel is heading for at minimum sixteen GB of HBM2E memory for each stack for a complete of sixty four GB throughout the Sapphire Rapids-SP package. Chatting about the bundle, the HBM variant will evaluate at an insane 5700mm2 or 28% much larger than the regular variant. When compared to the lately leaked EPYC Genoa numbers, the HBM2E deal for Sapphire Rapids-SP would conclusion up five% larger although the regular deal will be 22% smaller.

  • Intel Sapphire Rapids-SP Xeon (Standard Bundle) – 4446mm2
  • Intel Sapphire Rapids-SP Xeon (HBM2E Package) – 5700mm2
  • AMD EPYC Genoa (twelve CCD Offer) – 5428mm2
A substrate of the Intel Sapphire Rapids-SP Xeon CPU with HBM2e memory. (Impression Credits: CNET)

Intel also states that the EMIB backlink offers two times the bandwidth density enhancement and four moments superior electric power performance in contrast to normal package patterns. Interestingly, Intel phone calls the most current Xeon lineup Logically monolithic which indicates that they are referring to the interconnect that’ll supply the same functionality as a single-die would but technically, there are four chiplets that will be interconnected collectively. You can read the whole information with regards to the regular fifty six core & 112 thread Sapphire Rapids-SP Xeon CPUs listed here.

Intel Xeon SP Families:

Spouse and children Branding Skylake-SP Cascade Lake-SP/AP Cooper Lake-SP Ice Lake-SP Sapphire Rapids Emerald Rapids Granite Rapids Diamond Rapids
Course of action Node 14nm+ 14nm++ 14nm++ 10nm+ Intel seven Intel seven Intel four Intel 3?
Platform Title Intel Purley Intel Purley Intel Cedar Island Intel Whitley Intel Eagle Stream Intel Eagle Stream Intel Mountain Stream
Intel Birch Stream
Intel Mountain Stream
Intel Birch Stream
MCP (Multi-Chip Offer) SKUs No Certainly No No Yes TBD TBD (Quite possibly Indeed) TBD (Potentially Sure)
Socket LGA 3647 LGA 3647 LGA 4189 LGA 4189 LGA 4677 LGA 4677 LGA 4677 TBD
Max Main Count Up To 28 Up To 28 Up To 28 Up To 40 Up To fifty six Up To 64? Up To one hundred twenty? TBD
Max Thread Count Up To 56 Up To 56 Up To fifty six Up To 80 Up To 112 Up To 128? Up To 240? TBD
Max L3 Cache 38.5 MB L3 38.5 MB L3 38.5 MB L3 sixty MB L3 a hundred and five MB L3 one hundred twenty MB L3? TBD TBD
Memory Assistance DDR4-2666 six-Channel DDR4-2933 six-Channel Up To 6-Channel DDR4-3200 Up To 8-Channel DDR4-3200 Up To eight-Channel DDR5-4800 Up To eight-Channel DDR5-5600? TBD TBD
PCIe Gen Support PCIe three. (forty eight Lanes) PCIe three. (48 Lanes) PCIe 3. (forty eight Lanes) PCIe four. (sixty four Lanes) PCIe five. (eighty lanes) PCIe five. PCIe six.? PCIe 6.?
TDP Selection 140W-205W 165W-205W 150W-250W one zero five-270W Up To 350W Up To 350W TBD TBD
3D Xpoint Optane DIMM N/A Apache Go Barlow Move Barlow Go Crow Move Crow Move? Donahue Pass? Donahue Pass?
Levels of competition AMD EPYC Naples 14nm AMD EPYC Rome 7nm AMD EPYC Rome 7nm AMD EPYC Milan 7nm+ AMD EPYC Genoa ~5nm AMD Upcoming-Gen EPYC (Post Genoa) AMD Subsequent-Gen EPYC (Publish Genoa) AMD Subsequent-Gen EPYC (Publish Genoa)
Launch 2017 2018 2020 2021 2022 2023? 2024? 2025?

The article Intel Sapphire Rapids ‘4th Gen Xeon’ CPU Delidded By Der8auer, Unveils Serious Core Rely Die With 56 Golden Cove Cores by Hassan Mujtaba appeared initial on Wccftech.